FIGS. 1A-1C collectively illustrate a flash memory cell 100 of a conventional EEPROM split-gate flash memory (SGFM). The cell 100 includes: a floating gate 101 formed by a floating gate poly layer 102, a floating gate oxide layer 103, and a poly oxidation layer 104; a control gate or word line 105; and an interpoly layer 106 separating the floating gate 101 and the word line 105. The cell 100 further includes a single channel 107 which doubles as both a program channel and a read channel.
Conventional flash memory cells are associated with some disadvantages. One disadvantage is that electron trapping during programming impacts program injection. After long cycles, electron trapping increases and results in program failure. Another disadvantage is that the negative charges from electron trapping lowers the channel reading current for an erased cell, so that after long cycles, electron trapping increases and results in erase failure.
Accordingly, there is a need for a flash memory cell, which avoids the aforementioned disadvantages associated with conventional flash memory cells.